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    • 专利摘要:
    The present invention relates to a reference oscillator (20) for a transmitter and / or receiver of electromagnetic signals. The reference oscillator (20) is adapted to generate a modified reference signal (50) alternating ON times and OFF times with a predefined duty cycle from a signal provided by a reference resonator (22). The reference oscillator (20) also includes an adjustment circuit (30) adapted to adjust the duty ratio of the modified reference signal (50) according to at least one adjustment parameter dependent on a rank of at least one harmonic component of the modified reference signal (50) so as to minimize at least one harmonic component of the modified reference signal (50). The invention also relates to a frequency synthesizer and a radio frequency signal receiver comprising a reference oscillator (20) according to the invention.
    公开号:CH715021A2
    申请号:CH6542018
    申请日:2018-05-24
    公开日:2019-11-29
    发明作者:Casagrande Arnaud
    申请人:Swatch Group Res & Dev Ltd；
    IPC主号:
    专利说明:

    Description
    TECHNICAL FIELD OF THE INVENTION The invention relates to the field of reference oscillators and, more precisely in this field, the reference oscillators comprising means for suppressing or limiting at least one high harmonic. The invention finds applications for example in the fields of reception of radio frequency signals, analog-to-digital conversion, and frequency synthesis.
    STATE OF THE ART For the transmission of electromagnetic signals, in particular radiofrequency signals, suitable receivers are necessary. A conventional receiver is illustrated in fig. 1. The signal receiver 1 comprises an antenna 12 for the reception of electromagnetic signals. The antenna 12 is connected to a low noise amplifier 14 (LNA) adapted to amplify the signals received by the antenna 12. The LNA is also connected to a mixer 16 to mix the amplified and received signals with an oscillating signal 80 supplied by a frequency matching circuit 36, which is generally based on a reference oscillator 20. The output of the mixer 16 is connected to a bandpass (or lowpass) filter 18 to filter the intermediate signals 40 of the mixer 16. In fig. 1, the spectrum of the intermediate signals 40 is represented by the amplitude or the power (p) on the frequency (f).
    Typically, the reference oscillator 20 uses a signal generator 24 with a reference resonator 22 such as a quartz resonator, providing a well-defined and stable reference signal. For example, in typical applications of quartz resonators, the signal generator 24 with the reference resonator 22 operate at a reference frequency of 26 MHz. Generally, the reference oscillator 20 provides a reference signal which is used as the basis for the frequency matching circuit 36.
    In the case of radio frequency transmission, the signal receiver 1 can for example operate in a Bluetooth range, therefore in the 2.4 GHz band using a signal generator 24 with a quartz reference resonator 22 operating at 26 MHz. By radiation and parasitic coupling, the 93rd, 94th and 95th high harmonics of the frequency of the oscillator 20 based on the reference resonator 22 can then coincide with the frequency of the useful RF signals picked up by the antenna 12, and find themselves converted in band 41 of the bandpass filter (or lowpass) 18.
    In general, the particular waveform of the reference signal introduced by parasitic coupling of the high harmonics of the signal 50 on the input 12 (dotted arrow in FIG. 1) in the intermediate signals of the signal foldbacks and unwanted reference pollutants (present in the frequency band 41 of the filter 18). These harmonics have the consequence, locally on their specific frequency, of a reduction in the sensitivity of the receiver. The exact frequency of these harmonics, as well as their amplitude, depends directly on the duty cycle of the oscillating signal which, if not controlled, depends statistically on the conditions of production (manufacturing process) and use (temperature , voltage) of the integrated circuit comprising the oscillator, as well as typical variations of the reference resonator and its connections (PCB or card on which the integrated circuit comprising the resonator, housing, etc.) is produced.
    The intermediate signals received by the filter can therefore be severely disturbed by the high frequency harmonic components of the signal from the reference resonator (injected parasitically by coupling to the desired RF signal). This problem becomes even more important when the signal receiver is implemented in a single integrated circuit. This problem is even more significant in digital circuits, due to the very steep transitions of the reference (or clock) signal and the synchronous consumption peaks of the logic circuits.
    Patent application EP 2 869 483 A1 describes this problem in detail, and proposes to remove at least one of these harmonics by adjusting the duty cycle of the signal from the oscillator. The adjustment is carried out step by step, by incremental variations in the duty cycle adjusted as a function of a measurement of the effect of a previous variation, until a minimum disturbance is obtained.
    This solution is interesting insofar as it makes it possible to minimize very strongly and even to remove the harmonics polluting the output signal 40 of the receiver. However, this solution requires an establishment time with each activation. This activation time can be important, even too important for certain applications
    SUMMARY OF THE INVENTION The purpose of the invention is to provide an alternative solution to the solution proposed in patent application EP 2 869 483 A1, which does not require establishment time at start-up.
    To this end, the invention provides a new reference oscillator for a transmitter and / or receiver of radio frequency signals. The reference oscillator is suitable for generating a modified reference signal alternating ON times and OFF times with a predefined duty cycle from a signal supplied by a reference resonator. The invention is characterized in that the reference oscillator comprises an adjustment circuit adapted to adjust the ratio
    CH 715 021 A2 cyclic of the modified reference signal as a function of at least one predefined adjustment parameter so as to minimize at least one harmonic component of the modified reference signal.
    Thus, by appropriately and deterministically adjusting the duty cycle of the modified reference signal produced by the reference oscillator according to the invention, it is possible to minimize the pollution generated by certain harmonics of the modified reference signal, by example around a particular frequency. In addition, since the duty cycle is adjusted by predetermined parameters, in particular as a function of the rank of the harmonic or harmonics to be minimized, and not by successive adjustments, the duty cycle is adjusted as soon as the oscillator is activated.
    According to one embodiment, the oscillator can also include a reference generator coupled to the resonator to produce an initial reference signal, the adjustment circuit being coupled to the reference generator to generate the modified reference signal of ratio cyclic preset from the initial reference signal.
    The oscillator adjustment circuit may include a circuit for synchronizing the modified reference signal on a side of the initial reference signal. This makes it possible to compensate for a possible phase drift which could appear in the adjustment circuit.
    According to one embodiment, the receiver comprises a man / machine interface to allow a user to provide the adjustment circuit with at least one parameter for adjusting the duty cycle. The adjustment of the duty cycle is thus immediate, as soon as the reference oscillator is activated, and the duty cycle can be adjusted in real time in the event of a change in the frequency around which the harmonics must be minimized.
    The invention also provides a frequency synthesizer comprising a reference oscillator, as described above and a frequency adapter circuit for producing a high frequency oscillating signal from the modified reference signal. By adjusting the duty cycle of the adjustment circuit of the reference oscillator, the high frequency oscillating signal has the advantage of being cleansed of its harmonics around a particular frequency, and this upon activation of the oscillator reference.
    According to one embodiment, the frequency adaptation circuit comprises a PLL loop arranged to receive the modified reference signal of frequency f re f and produce an oscillating signal of higher frequency xf ref .
    The invention also provides a signal receiver, comprising:
    - an antenna for the reception of electromagnetic signals,
    - at least one low noise amplifier to amplify the signals received by the antenna,
    - at least one reference oscillator, as described above or at least one frequency synthesizer also described above, arranged to produce a modified reference signal or a high frequency oscillating signal with predefined duty cycle,
    - a mixer to mix the amplified and received signals with the modified reference signal or with the high frequency oscillating signal to generate intermediate signals,
    a filter for filtering the intermediate signals, the reference oscillator comprising an adjustment circuit adapted to adjust the duty cycle as a function of a frequency of the electromagnetic signals received to minimize an amplitude of at least one high harmonic component of the signal of reference modified and present in the filtered intermediate signals.
    Thus, in the receiver according to the invention, the duty cycle of the modified reference signal is predefined as a function of a frequency of the signals received on the antenna, to minimize the influence of any harmonics present around the frequency signals received on the antenna. And the optimal duty cycle is fixed as soon as the receiver is activated, and no set-up time is no longer necessary each time the receiver is activated to have optimized reception.
    BRIEF DESCRIPTION OF THE FIGURES The invention will be described below in more detail with the aid of the appended drawings, given by way of non-limiting examples, in which:
    fig. 1 shows a diagram of a signal receiver according to the prior art, FIG. 2 shows a diagram of a receiver according to the invention, FIG. 3 shows a diagram of a reference oscillator according to the invention producing a modified reference signal with controlled duty cycle, and
    CH 715 021 A2 fig. 4 shows a diagram of a frequency synthesizer according to the invention producing a high frequency signal with controlled duty cycle.
    DETAILED DESCRIPTION OF THE INVENTION As said previously, the invention provides a new reference oscillator 20. The invention also provides a frequency synthesizer 70 and a signal receiver comprising a reference oscillator 20.
    [0021] FIG. 3 details a reference oscillator 20 according to the invention, for example a MEMS or quartz crystal oscillator. It comprises a reference generator 24 locked on a reference resonator 22. The resonator 22 can be a MEMS resonator, a quartz crystal resonator, or a similar resonator. Examples of implementation of the resonator 22 and the reference generator 24 are also described in patent application EP 2 869 483 A1. The signal generator 24 supplies an initial reference signal 26 of constant and stable reference frequency f ref , typically in the range of several MHz, for example 26 MHz.
    In a reference oscillator 20 according to the invention, as shown in fig. 3, the generator 24 is connected to an adjustment circuit 30 of the duty cycle. The circuit 30 generates, on the basis of the initial reference signal 26 coming from the signal generator 24, a modified reference signal 50 having for example a rectangular waveform having an alternating sequence of times ON 51 and OFF 52. The ratio cyclic r defines the relationship between the duration of the ON times 51 and the duration of the OFF times 52 of the modified reference signal 50.
    In the oscillator 20 according to the invention, the duty cycle adjustment circuit 30 is arranged to provide a modified reference signal having a duty cycle r predefined as a function of at least one adjustment parameter so to minimize at least one harmonic component of the modified reference signal 50. In the example of FIG. 2, the reference oscillator 20 is used to make a signal receiver and at least one adjustment parameter is chosen as a function of a frequency of the electromagnetic signals received on the antenna or amplified, as will be seen better below. .
    For a rectangular signal, the amplitude of a harmonic of rank h is proportional to [sin (pi hr)] / (pi hr), where pi is the Archimedes constant, r is the duty cycle of the signal rectangular, and h is the rank of the harmonic considered. Setting the duty cycle r thus makes it possible to minimize the amplitude of at least one high harmonic component of the modified reference signal 50 injected parasitically into the spectrum of the desired RF signal and therefore to minimize harmonic pollution in the vicinity of the received frequency . As shown by the dotted arrow in fig. 2, the modified reference signal 50 introduced by parasitic coupling of the high harmonics of the signal 50 on the input 12.
    According to one embodiment, the reference oscillator 20 comprises a human-machine interface HMI (not shown) to allow a user to provide the adjustment circuit with at least one parameter for adjusting the duty cycle. According to a concrete mode of implementation, ΓΙΗΜ may include a selection button allowing the user to select a frequency of the signals to be received, and a memory, memorizing a table comprising, for each frequency of signals capable of being received, the parameter or parameters necessary for adjusting the duty cycle.
    According to the embodiment of FIG. 3, the adjustment circuit 30 comprises a circuit for generating the modified reference signal, circuit comprising a phase locked loop or PLL 31, a counter 32, a comparator 33 and a pulse generator 34. The PLL 31 is connected to the reference generator 24, and produces a signal of frequency n times greater than the frequency f re f of the reference signal (f = nf ref ). The counter 32 is connected to the PLL and counts pulses of the signal produced by the PLL. The counter is chosen to be able to count beyond the number n. The comparator 33 is connected to an output of the counter 32 and compares a number of pulses counted with a predefined value m. Comparator 33 produces an ON signal if the number of pulses counted is less than the predefined value m or an OFF signal otherwise. Finally, the pulse generator 34 is connected to the reference generator 24. It produces an initialization signal of the same frequency f ref as the initial reference signal, the initialization signal here is a pulse signal, comprising a sequence of pulses, a pulse being produced for example at each rising edge of the reference signal 26. The initialization signal is applied to an input for initializing the counter to zero the counter. The adjustment parameters m, n or m / n are provided depending on the envisaged application, for example via the HMI interface.
    The modified reference signal obtained at the output of the comparator is a rectangular signal, of frequency f ref and which, over a period T, is equal to ON for a first time T1 = m / f ref and equal to OFF otherwise. The duty cycle of the modified reference signal obtained in this exemplary embodiment is thus equal to r = m / n = T1 / T and is imposed by the parameters m and n. According to the invention, the parameters m and n are predefined as explained above.
    According to the embodiment of FIG. 3, the adjustment circuit also comprises a circuit 35 for synchronizing the modified reference signal on a side of the initial reference signal 26. The synchronization circuit makes it possible to compensate for any phase drift of the adjustment circuit 30. It allows thus for example to use a PLL 31 having fairly poor noise characteristics, but having the advantage of being of reduced power and size.
    CH 715 021 A2 The synchronization circuit 35 is in the example of FIG. 3 an RS flip-flop, a SET input of which is connected to the pulse generator 34 and a RESET input of which is connected to the output of comparator 33, the synchronized modified reference signal 50 being available on an output of flip-flop 35 which can be connected to a frequency adaptation circuit 36 of a RE receiver Each time it receives the initialization signal on its SET input, the output of the flip-flop RS changes from OFF to ON. The signal at the output of the flip-flop is thus synchronized on a side of the initial reference signal 26.
    [0030] FIG. 4 details an embodiment of a frequency synthesizer according to the invention comprising a reference oscillator 20 and a frequency matching circuit 36 for producing a high frequency oscillating signal OUT 80. The reference oscillator 20 is for example identical to that of fig. 3. The frequency adapter circuit is here a PLL loop 36 comprising a voltage controlled oscillator VCO 64, a divider circuit 65, a phase detector 61, a differential charge pump 62, a low-pass filter 63, and a circuit settings 66.
    It should also be noted that the modified reference signal 50 can also introduce, by parasitic coupling, high harmonics of the signal 50 at the input of the VCO 64.
    The oscillator 64 provides the high frequency oscillating signal OUT in a determined frequency band. The divider circuit 65 divides the frequency of the signal OUT by a factor N in order to provide a signal with divided frequency f div . The circuit 66 allows the factor N to be adjusted as a function of a desired frequency and of the divided frequency f div . The phase detector 61 compares the modified reference signal 50 at a reference frequency f re f with the divided frequency signal supplied by the divider circuit. The phase detector 61 supplies two control signals UP, DOWN (UP, DOWN in English terminology) as a function of the result of the comparison with the differential charge pump 62. The charge pump 62 injects or removes charges in the filter 63 in function of HIGH or LOW signals. The low-pass filter 63 filters the output signal Si of the charge pump to supply a filtered control signal S F to the voltage-controlled oscillator 64.
    The spectrum of the high frequency oscillating signal 80 shows the frequency signal supplied by the oscillator 64, signal comprising a main component W 81 and a harmonic pollution f P 82 generated by a harmonic of the initial reference signal 26. When the component main 81 and harmonic pollution 82 are too close to each other, oscillator 64 produces a series of additional harmonics of frequency f or t ± k (f or t — fp), phenomenon known as "VCO pulling". The adjustment circuit 30 advantageously here makes it possible to limit the harmonic 82 of the initial reference signal 26, and thus to limit the phenomenon of "VCO pulling".
    Finally, FIG. 2 details a signal receiver 10 according to the invention. The receiver includes an antenna 12, a low noise amplifier LNA 14, a mixer 16 and a bandpass or lowpass filter 18. The antenna 12 is adapted to receive electromagnetic signals. According to the invention, the receiver also comprises a reference frequency synthesizer comprising a reference oscillator 20 according to the invention and a frequency adaptation circuit 36. The amplifier 14 is connected to the antenna 12 to amplify the signals received by the antenna 12. The reference oscillator 20 comprises a reference resonator 22 for generating a modified reference signal 50 alternating ON times and OFF times with a predefined duty cycle. The mixer 16 is connected to the amplifier 14 and to the frequency matching circuit 36 to mix the amplified and received signals with the high frequency signal OUT 80 and to generate intermediate signals 40. Finally, the bandpass filter (or 18) is connected at the output of the mixer to filter the intermediate signals 40. Examples of implementation of the antenna 12, the amplifier 14, the mixer 16 and the filter 18 are described in detail in the application for EP 2 869 483 A1, incorporated herein by reference. The reference oscillator 20 and the frequency adaptation circuit 36 can be produced in accordance with FIGS. 3 and 4. Note that the frequency matching circuit 36 is useful here only if the signals received on the antenna have a frequency far from the frequency of the reference signal. Otherwise, the receiver can be made without frequency matching circuit 36.
    From the description which has just been made, several variants of the reference oscillator, the frequency synthesizer and the signal receiver can be designed by a person skilled in the art without departing from the scope of the invention defined by the claims.
    权利要求:
    Claims (10)
    [1]
    claims
    1. Reference oscillator (20) for an emitter and / or receiver of electromagnetic signals, the reference oscillator (20) being adapted to generate a modified reference signal (50) alternating ON times and OFF times with a duty cycle predefined from a signal supplied by a reference resonator (22), characterized in that the reference oscillator (20) also includes an adjustment circuit (30) adapted to adjust the duty cycle of the signal modified reference (50) as a function of at least one adjustment parameter so as to minimize at least one harmonic component of the modified reference signal (50).
    [2]
    2. Reference oscillator (20) according to claim 1, also comprising a reference generator (24) coupled to the resonator (22) to produce an initial reference signal (26), the adjustment circuit being coupled to the reference generator (24) for generating the modified reference signal (50) of predefined duty cycle from the initial reference signal (26).
    CH 715 021 A2
    [3]
    3. Reference oscillator (20) according to claim 2 in which the adjustment circuit generating the modified reference signal (50) comprises:
    - a phase locked loop or PLL (31), connected to the reference generator (24) and adapted to produce a signal of frequency n times greater than the frequency W of the initial reference signal (26),
    - a counter (32) connected to the PLL loop for counting pulses of the signal produced by the PLL loop,
    a comparator (33) for comparing a number of pulses counted with a predefined value m, and producing an ON signal if the number of pulses counted is less than the predefined value m or an OFF signal otherwise, and
    - a pulse generator (34) connected to the reference generator and arranged to produce an initialization signal of the same frequency as the initial reference signal, said initialization signal being applied to an initialization input of the counter.
    [4]
    4. Reference oscillator (20) according to one of claims 2 and 3 wherein the adjustment circuit also comprises a circuit for synchronizing the modified reference signal (50) on a side of the initial reference signal (26).
    [5]
    5. Reference oscillator (20) according to claim 4 in combination with claim 3 in which the synchronization circuit comprises a flip-flop RS of which a SET input is connected to the pulse generator and of which a RESET input is connected to the comparator output , the synchronized oscillating signal (50) being available on an output of the flip-flop.
    [6]
    6. Reference oscillator (20) according to one of claims 1 to 5, also comprising a Man / Machine interface (HMI) to allow a user to provide the adjustment circuit with at least one duty cycle adjustment parameter .
    [7]
    7. Frequency synthesizer (70) comprising a reference oscillator (20) according to one of claims 1 to 6 and a frequency matching circuit (36) for producing a high frequency oscillating signal (80).
    [8]
    8. Frequency synthesizer (70) according to claim 7 wherein the frequency matching circuit comprises a PLL loop (36) arranged to receive the modified reference signal (50) of frequency f re f and produce an oscillating signal of highest frequency xf re f.
    [9]
    9. Frequency synthesizer (70) according to claim 8 in which the frequency adaptation circuit (36) comprises:
    - a voltage controlled oscillator VCO (64) to supply the high frequency oscillating signal OUT (80),
    - a divider circuit (65) for dividing the frequency of the signal OUT by a factor N in order to provide a signal with divided frequency fdiv,
    - a phase detector (61) to compare the modified reference signal (50) at reference frequency f re f with the signal at divided frequency f div supplied by the divider circuit and supply two control signals HIGH, LOW depending on the result of comparison,
    a charge pump (62) for receiving the two HIGH, LOW control signals from the phase detector (61), and
    - a low-pass filter (63) for filtering an output signal (Si) from the charge pump (62) to supply a filtered control signal (S F ) to the voltage-controlled oscillator (64).
    [10]
    10. Signal receiver (10), comprising:
    - an antenna (12) for receiving electromagnetic signals,
    - at least one low noise amplifier (14) for amplifying the signals received by the antenna (12),
    - at least one reference oscillator (20) according to one of claims 1 to 6 or at least one frequency synthesizer (70) according to one of claims 7 to 9 for producing a modified reference signal (50) or a high frequency oscillating signal (80) with predefined duty cycle,
    a mixer (16) for mixing the amplified and received signals with the modified reference signal (50) or with the high frequency oscillating signal (80) to generate intermediate signals (40), and
    a filter (18) for filtering the intermediate signals (40), an adjustment circuit (30) of the reference oscillator (20) being adapted to adjust the duty cycle as a function of a frequency of the electromagnetic signals received for minimize the amplitude of at least one harmonic component of the modified reference signal (50) and present (42) in the filtered intermediate signals (40).
    CH 715 021 A2

    CH 715 021 A2
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    同族专利:
    公开号 | 公开日
    CH715021B1|2021-11-30|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    CH00654/18A|CH715021B1|2018-05-24|2018-05-24|Reference oscillator with variable duty cycle, frequency synthesizer and signal receiver with reference oscillator.|CH00654/18A| CH715021B1|2018-05-24|2018-05-24|Reference oscillator with variable duty cycle, frequency synthesizer and signal receiver with reference oscillator.|
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